Renesas H8S/2319 series Hardware Manual page 411

Contention between Overflow/Underflow and Counter Clearing: If overflow/underflow and
counter clearing occur simultaneously, the TCFV/TCFU flag in TSR is not set and TCNT clearing
takes precedence.
Figure 9-56 shows the operation timing when a TGR compare match is specified as the clearing
source, and H'FFFF is set in TGR.
TCNT input
clock
TCNT
Counter
clear signal
TGF
TCFV
Figure 9-56 Contention between Overflow and Counter Clearing
φ
H'FFFF
Inhibited
H'0000
Rev. 5.00, 12/03, page 381 of 1088