Renesas H8S/2319 series Hardware Manual page 712

Table 17-50 Usable Parameters and Target Modes
Name of Abbre-
Parameter viation
Download pass/ DPFR
fail result
Flash pass/fail FPFR
result
Flash FPEFEQ
programming/
erasing frequency
control
Flash FMPAR
multipurpose
address area
Flash multi- FMPDR
purpose data
destination area
Flash erase FEBS
block select
Note: * One byte of start address of download destination specified by FTDAR
(1) Download Control
The on-chip program is automatically downloaded by setting the SCO bit to 1. The on-chip RAM
area to be downloaded is the area as much as 4 kbytes starting from the start address specified by
FTDAR. For the address map of the on-chip RAM, see figure 17-69.
The download control is set by using the programming/erasing interface register. The return value
is given by the DPFR parameter.
(a) Download pass/fail result parameter (DPFR: one byte of start address of on-chip RAM
specified by FTDAR)
This parameter indicates the return value of the download result. The value of this parameter can
be used to determine if downloading is executed or not. Since the confirmation whether the SCO
bit is set to 1 is difficult, the certain determination must be performed by setting one byte of the
start address of the on-chip RAM area specified by FTDAR to a value other than the return value
of download (for example, H'FF) before the download start (before setting the SCO bit to 1). Refer
to item [e] in the User Program Mode Programming Procedure portion of section 17.24.2 for
information on the method for checking the download result.
Rev. 5.00, 12/03, page 682 of 1088
Down- Initializa- Program-
load tion ming
— —
—
— —
— —
— —
— — —
Initial
Erasure R/W Value
— R/W Undefined
R/W Undefined
— R/W Undefined
— R/W Undefined
— R/W Undefined
R/W Undefined
Alloca-
tion
On-chip
RAM *
R0L of
CPU
ER0 of
CPU
ER1 of
CPU
ER0 of
CPU
ER0 of
CPU