System Control Register 2 (Syscr2) - Renesas H8S/2319 series Hardware Manual

Table 17-7 Flash Memory Erase Blocks
Block (Size)
EB0 (4 kbytes)
EB1 (4 kbytes)
EB2 (4 kbytes)
EB3 (4 kbytes)
EB4 (4 kbytes)
EB5 (4 kbytes)
EB6 (4 kbytes)
EB7 (4 kbytes)
EB8 (32 kbytes)
EB9 (64 kbytes)
2
EB10 (64 kbytes) *
2
EB11 (64 kbytes) *
1
EB12 (64 kbytes) *
1
EB13 (64 kbytes) *
Notes: 1. These blocks are valid only in the H8S/2315 F-ZTAT and H8S/2314 F-ZTAT.
2. Not available in the H8S/2317 F-ZTAT.
17.5.5

System Control Register 2 (SYSCR2)

Bit : 7
—
Initial value : 0
R/W : —
SYSCR2 is an 8-bit readable/writable register that performs on-chip flash memory control.
SYSCR2 is initialized to H'00 by a reset and in hardware standby mode.
SYSCR2 can only be used in the F-ZTAT versions. In the mask ROM versions this register will
return an undefined value if read, and cannot be modified.
Bits 7 to 4—Reserved: These bits cannot be modified and are always read as 0.
Rev. 5.00, 12/03, page 572 of 1088
Address
H'000000 to H'000FFF
H'001000 to H'001FFF
H'002000 to H'002FFF
H'003000 to H'003FFF
H'004000 to H'004FFF
H'005000 to H'005FFF
H'006000 to H'006FFF
H'007000 to H'007FFF
H'008000 to H'00FFFF
H'010000 to H'01FFFF
H'020000 to H'02FFFF
H'030000 to H'03FFFF
H'040000 to H'04FFFF
H'050000 to H'05FFFF
6 5
— —
0 0
— —
4 3
— FLSHE —
0 0
— R/W —
2 1 0
— —
0 0 0
— —