Renesas H8S/2319 series Hardware Manual page 281

Port A MOS Pull-Up Control Register (PAPCR)
Bit : 7
—
Initial value : Undefined Undefined Undefined Undefined
R/W : —
PAPCR is an 8-bit readable/writable register that controls the MOS input pull-up function
incorporated into port A on an individual bit basis.
Bits 7 to 4 are reserved; they return an undetermined value if read, and cannot be modified.
Bits 3 to 0 are valid in modes 6 and 7 * , and all the bits are invalid in modes 4 and 5. When
PADDR bits are cleared to 0 (input port setting), setting the corresponding PAPCR bits to 1 turns
on the MOS input pull-up for the corresponding pins.
PAPCR is initialized to H'0 (bits 3 to 0) by a reset, and in hardware standby mode. It retains its
prior state after in software standby mode.
Note: * Modes 6 and 7 are not available in the ROMless versions.
Port A Open Drain Control Register (PAODR)
Bit : 7
—
Initial value : Undefined Undefined Undefined Undefined
R/W : —
PAODR is an 8-bit readable/writable register that controls whether PMOS is on or off for each
port A pin (PA3 to PA0).
Bits 7 to 4 are reserved; they return an undetermined value if read, and cannot be modified.
All bits are valid in mode 7. *
Setting PAODR bits to 1 makes the corresponding port A pins NMOS open-drain outputs, while
clearing the bits to 0 makes the pins CMOS outputs.
PAODR is initialized to H'0 (bits 3 to 0) by a reset, and in hardware standby mode. It retains its
prior state after in software standby mode.
Note: * Modes 6 and 7 are not available in the ROMless versions.
6 5
— —
— —
6 5
— —
— —
4 3
— PA3PCR PA2PCR PA1PCR PA0PCR
0
— R/W R/W
4 3
— PA3ODR PA2ODR PA1ODR PA0ODR
0
— R/W R/W
Rev. 5.00, 12/03, page 251 of 1088
2 1
0 0
R/W R/W
2 1
0 0
R/W R/W
0
0
0
0