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14.4.4
Output Compare Buffer Registers (OCCPB0 to OCCPB5) /
Output Compare Registers (OCCP0 to OCCP5)
Output compare buffer register (OCCPB) is a 16-bit buffer register of output compare
register (OCCP). Both OCCPB and OCCP registers are located in the same address.
■ Output Compare Buffer Registers (OCCPB0 to OCCPB5)
Figure 14.4-10 Output Compare Buffer Registers (OCCPB0 to OCCPB5)
Output Compare Buffer Register (Upper)
Address: ch.0 000071
ch.1 000073
ch.2 000075
ch.3 000077
ch.4 000079
ch.5 00007B
Read/write
Initial value
Output Compare Buffer Register (Lower)
Address: ch.0 000070
ch.1 000072
ch.2 000074
ch.3 000076
ch.4 000078
ch.5 00007A
Read/write
Initial value
Output compare buffer register is the buffer register of output compare register (OCCP). When buffer
function is disabled (OCS0/OCS2/OCS4:BUF0/BUF1=1) or when free-run timer is stopped, value in
output compare buffer register is transferred to output compare register immediately. When buffer function
is enabled (OCS0/OCS2/OCS4:BUF0/BUF1=0), value is transferred at compare clear match or zero
detection depending on transfer selection bit BTS in compare control register (OCS1/OCS3/OCS5).
Word access to this register is recommended.
H
H
bit
15
14
H
H
H
OP15
OP14 OP13 OP12
H
W
W
W
X
X
X
H
H
bit
7
6
H
H
H
OP07
OP06 OP05 OP04
H
W
W
W
X
X
CHAPTER 14 MULTI-FUNCTIONAL TIMER
13
12
11
10
OP11 OP10
W
W
W
X
X
X
5
4
3
OP03 OP02
W
W
W
X
X
X
X
9
8
OCCPB0 to
OP09 OP08
OCCPB5
W
W
X
X
2
1
0
OCCPB0 to
OP01 OP00
OCCPB5
W
W
X
X
299
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