Table 8-3 Auxiliary Control Register Bit Assignments; Figure 8-3 Systick Control And Status Register Bit Assignments - ARM Cortex-M3 Technical Reference Manual

Bits Field
[31:3] -
[2] DISFOLD
[1] DISDEFWBUF
[0] DISMCYCINT
31
ARM DDI 0337G
Unrestricted Access
Table 8-3 describes the bit assignments of the Auxiliary Control Register.
Function
Reserved
Disables IT folding.
Disables write buffer use during default memory map accesses. This causes all bus faults to
be precise bus faults but decreases the performance of the processor because the stores to
memory have to complete before the next instruction can be executed.
Disables interruption of multi-cycle instructions. This increases the interrupt latency of the
processor because LDM/STM completes before interrupt stacking occurs.
SysTick Control and Status Register
Use the SysTick Control and Status Register to enable the SysTick features.
The register address, access type, and Reset state are:
Address
0xE000E010
Access Read/write
Reset state 0x00000000
Figure 8-3 shows the bit assignments of the SysTick Control and Status Register.
Reserved

Figure 8-3 SysTick Control and Status Register bit assignments

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Table 8-3 Auxiliary Control Register bit assignments

17 16 15
COUNTFLAG
Non-Confidential
Nested Vectored Interrupt Controller
Reserved
CLKSOURCE
TICKINT
ENABLE
2 1 0
8-9