ARM Cortex-M3 Technical Reference Manual page 319

R2p0
Hide thumbs Also See for Cortex-M3:
Table of Contents

Advertisement

Port name
ETMISTALL
ETMTRIGGER[3:0]
ETMTRIGINOTD[3:0]
ARM DDI 0337G
Unrestricted Access
Direction
Qualified by
Output
No qualifier
Output
No qualifier
Output
No qualifier
Copyright © 2005-2008 ARM Limited. All rights reserved.
Non-Confidential
Embedded Trace Macrocell Interface
Table 15-1 ETM interface ports (continued)
Description
Indicates that the last instruction signalled by the core has
not yet entered execute. If ETMICANCEL is asserted
with ETMISTALL, it indicates that the stalled
instruction did not execute, and the previous instruction
was cancelled.
Output trigger from DWT. One bit for each of the four
DWT comparators.
Output indicates if the ETM is triggered on an instruction
or data match.
15-5

Advertisement

Table of Contents
loading

Table of Contents