Figure 1-1 Cortex-M3 Block Diagram - ARM Cortex-M3 Technical Reference Manual

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INTISR[239:0]

Processor core

ARM DDI 0337G

Unrestricted Access

Private Peripheral Bus

The processor core implements the ARMv7-M architecture. It has the following main

Thumb instruction set subset, consisting of all base Thumb instructions, 16-bit

and 32-bit. See the ARMv7-M Architecture Reference Manual for more

information.

Harvard processor architecture enabling simultaneous instruction fetch with data

Three-stage pipeline.

Single cycle 32-bit multiply.

Non-Confidential

Figure 1-1 Cortex-M3 block diagram

Introduction

(serial wire

or multi-pin)