Figure 5-8 Return From Interrupt Flowchart - ARM Cortex-M3 Technical Reference Manual

Exceptions
5-36 Copyright © 2005-2008 ARM Limited. All rights reserved.
Non-Confidential
Return
Pop next register
Late-arriving
higher priority
interrupt?
No
Popped last
No
register?
Yes
Adjust stack, load pipeline
from PC
Execute instructions

Figure 5-8 Return from interrupt flowchart

Yes
Set LR, tail-chain to new
interrupt
Read new PC from vector
table
Fill pipeline from PC
Execute instructions
ARM DDI 0337G
Unrestricted Access