Table of Contents
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Chapter 12
Bus Interface
ARM DDI 0337G
Unrestricted Access
This chapter describes the processor bus interface. It contains the following sections:
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About bus interfaces on page 12-2
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AMBA 3 compliance on page 12-3
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ICode bus interface on page 12-4
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DCode bus interface on page 12-6
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System interface on page 12-7
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Unifying the code buses on page 12-9
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External private peripheral interface on page 12-10
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Access alignment on page 12-11
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Unaligned accesses that cross regions on page 12-12
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Bit-band accesses on page 12-13
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Write buffer on page 12-14
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Memory attributes on page 12-15
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AHB timing characteristics on page 12-16.
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Non-Confidential
12-1
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