Table 9-7 Mpu Protection Region Size Field - ARM Cortex-M3 Technical Reference Manual

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Memory Protection Unit

Bufferable bit:

1 = bufferable

0 = not bufferable.

Sub-Region Disable (SRD) field. Setting an SRD bit disables the corresponding sub-region.

Regions are split into eight equal-sized sub-regions. Sub-regions are not supported for region sizes

of 128 bytes and less. For more information, see Sub-Regions on page 9-12.

MPU Protection Region Size Field. See Table 9-7.

Region enable bit.

Table 9-6 MPU Region Attribute and Size Register bit assignments (continued)

For information about access permission, see MPU access permissions on page 9-13.

Table 9-7 MPU protection region size field

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