Figure 14-3 Exception Encoding For Branch Packet - ARM Cortex-M3 Technical Reference Manual

Embedded Trace Macrocell
14-14
Number of bytes
2 bytes exception
2 bytes exception
2 bytes exception
2 bytes exception
2 bytes exception
.
.
.
2 bytes exception
Figure 14-3 shows the full branch with exception packet.
7 6 5
C
E/
C
Addr[13]
E/
C
Addr[20]
E/
C
Addr[27]
C E 0
C T2EE Canc
C 0 SBZ
Copyright © 2005-2008 ARM Limited. All rights reserved.
Table 14-8 Exception tracing mapping (continued)
Exception
Reserved
Reserved
IRQ8
IRQ9
IRQ10
.
.
.
IRQ239
4 3 2
Addr[6:1]
Addr[12:7]
Addr[19:14]
Addr[26:21]
1 Addr[31:28]
Excp[3:0]
Excp[8:4]

Figure 14-3 Exception encoding for branch packet

Non-Confidential
ETMINTNUM Traced value
7 22
13 23
24 24
25 25
26 26
. .
. .
. .
255 255
1 0
1 Address byte 0
Address byte 1
(optional)
Address byte 2
(optional)
Address byte 3
(optional)
Address byte 4
(optional)
Exception information
NS
Byte 0
Exception information
Byte 1 (optional)
ARM DDI 0337G
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