ARM Cortex-M3 Technical Reference Manual page 86

System Control
Name
Sequencer
External Outputs
CID Comparators
Implementation specific
Synchronization Frequency
ETM ID
Configuration Code Extension
Extended External Input Selector
TraceEnable Start/Stop Embedded ICE
Embedded ICE Behavior Control
CoreSight Trace ID
OS Save/Restore
ITMISCIN
ITTRIGOUT
ITATBCTR2
ITATBCTR0
Integration Mode Control
Claim Tag
Lock Access
Authentication Status
Device Type
Peripheral ID 4
Peripheral ID 5
Peripheral ID 6
Peripheral ID 7
3-14
Type
Read/write
Write-only
Write-only
Write-only
Read-only
Read-only
Read-only
Write-only
Read/write
Write-only
Read/write
Write-only
Read-only
Write-only
Read-only
Write-only
Read/write
Read/write
Write-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
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Table 3-10 ETM registers (continued)
Address
0xE0041180- 0xE0041194, 0xE0041198
0xE00411A0-0xE00411AC
0xE00411B0-0xE00411BC
0xE00411C0-0xE00411DC
0xE00411E0
0xE00411E4
0xE00411E8
0xE00411EC
0xE00411F0
0xE00411F4
0xE0041200
0xE0041304-0xE0041308
0xE0041EE0
0xE0041EE8
0xE0041EF0
0xE0041EF8
0xE0041F00
0xE0041FA0-0xE0041FA4
0xE0041FB0-0xE0041FB4
0xE0041FB8
0xE0040FCC
0xE0041FD0
0xE0041FD4
0xE0041FD8
0xE0041FDC
Present
No
No
No
No
Yes
Yes
Yes
No
Yes
No
Yes
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
ARM DDI 0337G
Unrestricted Access