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Operation
Table branch byte
Table branch halfword
Exclusive OR register value with immediate 12-bit value
Exclusive OR register value with shifted register value
Logical AND register value with 12-bit immediate value
Logical AND register value with shifted register value
Copy bit field from register value to register and zero-extend to
32 bits
Unsigned divide
Multiply two unsigned register values and add to a 2-register
value
Multiply two unsigned register values
Unsigned saturate
Copy unsigned byte to register and zero-extend to 32 bits
Copy unsigned halfword to register and zero-extend to 32 bits
Wait for event
Wait for interrupt
ARM DDI 0337G
Unrestricted Access
Table 2-5 32-bit Cortex-M3 instruction summary (continued)
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Non-Confidential
Assembler
TBB [<Rn>, <Rm>]
TBH [<Rn>, <Rm>, LSL #1]
TEQ.W <Rn>, #<modify_constant(immed_12)>
TEQ.W <Rn>, <Rm>{, <shift}
TST.W <Rn>, #<modify_constant(immed_12)>
TST.W <Rn>, <Rm>{, <shift>}
UBFX.W <Rd>, <Rn>, #<lsb>, #<width>
UDIV<c> <Rd>,<Rn>,<Rm>
UMLAL.W <RdLo>, <RdHi>, <Rn>, <Rm>
UMULL.W <RdLo>, <RdHi>, <Rn>, <Rm>
USAT <c> <Rd>, #<imm>, <Rn>{, <shift>}
UXTB.W <Rd>, <Rm>{, <rotation>}
UXTH.W <Rd>, <Rm>{, <rotation>}
WFE.W
WFI.W
Programmer's Model
2-23
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