Table 2-1 Application Program Status Register Bit Assignments; Figure 2-2 Application Program Status Register Bit Assignments; Figure 2-3 Interrupt Program Status Register Bit Assignments - ARM Cortex-M3 Technical Reference Manual

Programmer's Model
31 30 29 28 27
N Z C V
31
2-6
26
Q

Figure 2-2 Application Program Status Register bit assignments

Table 2-1 describes the bit assignments of the APSR.

Table 2-1 Application Program Status Register bit assignments

Interrupt PSR
The Interrupt PSR (IPSR) contains the Interrupt Service Routine (ISR) number of the
current exception activation.
Figure 2-2 shows the bit assignments of the IPSR.

Figure 2-3 Interrupt Program Status Register bit assignments

Copyright © 2005-2008 ARM Limited. All rights reserved.
Reserved
Field Name
[31] N
[30] Z
[29] C
[28] V
[27] Q
[26:0] -
Reserved
Non-Confidential
Definition
Negative or less than flag:
1 = result negative or less than
0 = result positive or greater than.
Zero flag:
1 = result of 0
0 = nonzero result.
Carry/borrow flag:
1 = carry or borrow
0 = no carry or borrow.
Overflow flag:
1 = overflow
0 = no overflow.
Sticky saturation flag.
Reserved.
9 8
ISR NUMBER
ARM DDI 0337G
Unrestricted Access
0
0