ARM Cortex-M3 Technical Reference Manual page 404

R2p0
Hide thumbs Also See for Cortex-M3:
Table of Contents

Advertisement

Glossary
Debug Access Port (DAP)
Debugger
Embedded Trace Macrocell (ETM)
Endianness
ETM
Exception
Exception handler
Exception vector
External PPB
Flash Patch and Breakpoint unit (FPB)
Formatter
Halfword
Glossary-6
A TAP block that acts as an AMBA, AHB or AHB-Lite, master for access to a system
bus. The DAP is the term used to encompass a set of modular blocks that support system
wide debug. The DAP is a modular component, intended to be extendable to support
optional access to multiple systems such as memory mapped AHB and CoreSight APB
through a single debug interface.
A debugging system that includes a program, used to detect, locate, and correct software
faults, together with custom hardware that supports software debugging.
A hardware macrocell that, when connected to a processor core, outputs instruction
trace information on a trace port.
Byte ordering. The scheme that determines the order that successive bytes of a data
word are stored in memory. An aspect of the system's memory mapping.
See also Little-endian and Big-endian
See Embedded Trace Macrocell.
An error or event which can cause the processor to suspend the currently executing
instruction stream and execute a specific exception handler or interrupt service routine.
The exception could be an external interrupt or NMI, or it could be a fault or error event
that is considered serious enough to require that program execution is interrupted.
Examples include attempting to perform an invalid memory access, external interrupts,
and undefined instructions. When an exception occurs, normal program flow is
interrupted and execution is resumed at the corresponding exception vector. This
contains the first instruction of the interrupt service routine to deal with the exception.
See Interrupt service routine.
See Interrupt vector.
PPB memory space at
0xE0040000
A set of address matching tags, that reroute accesses into flash to a special part of
SRAM. This permits patching flash locations for breakpointing and quick fixes or
changes.
The formatter is an internal input block in the ETB and TPIU that embeds the trace
source ID within the data to create a single trace stream.
A 16-bit data item.
Copyright © 2005-2008 ARM Limited. All rights reserved.
to
0xE00FFFFF
Non-Confidential
.
ARM DDI 0337G
Unrestricted Access

Advertisement

Table of Contents
loading

Table of Contents