Table 3-6 Ahb-Ap Register Summary; Table 3-7 Summary Of Debug Interface Port Registers - ARM Cortex-M3 Technical Reference Manual

System Control
3.1.4 Debug interface port registers
3-10
Advanced High Performance Bus Access Port registers
Table 3-6 gives a summary of the Advanced High-performance Bus Access Port
(AHB-AP) registers. For a detailed description of the AHB-AP registers, see Chapter 11
System Debug.
Name
Control and Status Word
Transfer Address
Data Read/write
Banked Data 0
Banked Data 1
Banked Data 2
Banked Data 3
Debug ROM Address
Identification Register
Table 3-7 gives a summary of the debug interface port registers. For a detailed
description of the debug interface port registers, see Chapter 13 Debug Port.
Name
ABORT
IDCODE
CTRL/STAT
SELECT
RDBUFF
Copyright © 2005-2008 ARM Limited. All rights reserved.

Table 3-7 Summary of Debug interface port registers

SWJ-DP SW-DP
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Non-Confidential

Table 3-6 AHB-AP register summary

Type Address
Read/write
0x00
Read/write
0x04
Read/write 0x0C
Read/write 0x10
Read/write
0x14
Read/write
0x18
Read/write
0x1C
Read-only
0xF8
Read-only
0xFC
Description
The Abort Register
The Identification Code Register
The Control/Status Register
The AP Select Register
The Read Buffer Register
Reset
value
See Register
-
-
-
-
-
-
0xE000E000
0x24770011
ARM DDI 0337G
Unrestricted Access