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5.9.2
Intended boot-up sequence
Action
Initialize variables
[Setup stacks]
Initialize any runtime
[Initialize any peripherals]
[Switch ISR vector table]
[Setup Configurable Faults]
ARM DDI 0337G
Unrestricted Access
0,
// Populate if using MemManage (MPU)
0,
// Populate if using Bus fault
0,
// Populate if using Usage Fault
0, 0, 0, 0, // reserved slots
SVCallISR,
0,
// Populate if using a debug monitor
0,
// Reserved
0,
// Populate if using pendable service request
0,
// Populate if using SysTick
// external interrupts start here
Timer1ISR,
GpioInISR
GpioOutISR,
I2CIsr
};
Note
Vector table entries are ARM/Thumb interworking compatible. This causes bit [0] of
the vector value to load into the EPSR T-bit on exception entry. Creating a table entry
with bit [0] clear generates an INVSTATE fault on the first instruction of the handler
corresponding to this vector.
A normal reset routine follows the steps shown in Table 5-8. A C/C++ runtime can
perform the first three steps and then call
Description
Any global/static variables must be setup. This includes initializing the BSS variable to 0,
and copying initial values from ROM to RAM for non-constant variables.
If more than one stack is be used, the other banked SPs must be initialized. The current SP
can also be changed to Process from Main.
Optionally make calls to C/C++ runtime init code to enable use of heap, floating point, or
other features. This is normally done by
Setup peripherals before interrupts are enabled. This can call to setup each peripheral to be
used in the application.
Optionally change vector table from Code area, @0, to a location in SRAM. This is only
done to optimize performance or enable dynamic changes.
Enable Configurable faults and set their priorities.
Copyright © 2005-2008 ARM Limited. All rights reserved.
main()
__main
Non-Confidential
.
Table 5-8 Reset boot-up behavior
from the C/C++ library.
Exceptions
5-21
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