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14.2
Data tracing
ARM DDI 0337G
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The Cortex-M3 system can perform low-bandwidth data tracing using the Data
Watchpoint and Trace (DWT) and Instruction Trace Macrocell (ITM) components. To
enable support of instruction trace with a low pin-count, data trace is not included in the
ETM. This considerably reduces gate count for the ETM, because the triggering
resources are simplified.
When the ETM is implemented in the processor, the two trace sources, ITM and ETM,
both feed into the TPIU, where they are combined and usually output over the trace port.
DWT is able to provide either focused data trace, or global data trace, subject to FIFO
overflow issues. The TPIU is optimized for the requirements of a single core Cortex-M3
system.
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Embedded Trace Macrocell
14-7
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