ARM Cortex-M3 Technical Reference Manual page 150

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Power Management
7-10
Note
If the debug logic is included in a powered-down domain, then nTDOEN needs to be
handled carefully. It cannot be clamped to 0 because this enables it during power down.
Either:
Insert inverters either side of the clamp.
Ensure that the external system masks nTDOEN when the core is powered down.
Clamp nTDOEN to 1 during power down.
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