Table of Contents
Advertisement
Programmer's Model
2.1
About the programmer's model
2.1.1
Operating modes
2.1.2
Operating states
2-2
The processor implements the ARMv7-M architecture. This includes all the 16-bit
Thumb instructions and the base 32-bit Thumb instructions. The processor cannot
execute ARM instructions. For more information about the ARMv7-M Thumb
instruction set see the ARMv7-M Architecture Reference Manual.
The processor supports two modes of operation, Thread mode and Handler mode:
•
Thread mode is entered on Reset, and can be entered as a result of an exception
return. Privileged and User (Unprivileged) code can run in Thread mode.
•
Handler mode is entered as a result of an exception. All code is privileged in
Handler mode.
The processor can operate in one of two operating states:
•
Thumb state. This is normal execution running 16-bit and 32-bit halfword aligned
Thumb instructions.
•
Debug State. This is the state when in halting debug.
Copyright © 2005-2008 ARM Limited. All rights reserved.
Non-Confidential
ARM DDI 0337G
Unrestricted Access
Advertisement
Table of Contents
