ARM Cortex-M3 Technical Reference Manual page 309

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Authentication Status

Peripheral ID 4

Peripheral ID 5

Peripheral ID 6

Peripheral ID 7

Peripheral ID 0

Peripheral ID 1

Peripheral ID 2

Peripheral ID 3

Component ID 0

Component ID 1

Component ID 2

Component ID 3

Description of ETM registers

ARM DDI 0337G

Unrestricted Access

An additional description of some of the ETM registers is given in the following

sections. See the ARM Embedded Trace Macrocell Architecture Specification for more

information.

ETM Control Register

The ETM Control Register controls general operation of the ETM, such as whether

tracing is enabled.

Reset value:

Implemented bits:

[21] Port Size[3]

[17:16] Port Mode[1:0]

[13] Port Mode[2]

Non-Confidential

Embedded Trace Macrocell

Table 14-9 ETM registers (continued)

Implemented as normal.

Reset value: