Table 8-4 Systick Control And Status Register Bit Assignments - ARM Cortex-M3 Technical Reference Manual

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Nested Vectored Interrupt Controller
Bits
Field
[31:17]
-
[16]
COUNTFLAG
[2]
CLKSOURCE
[1]
TICKINT
[0]
ENABLE
8-10
Table 8-4 describes the bit assignments of the SysTick Control and Status register.

Table 8-4 SysTick Control and Status Register bit assignments

Function
Reserved.
Returns 1 if timer counted to 0 since last time this was read. Clears on read by application of
any part of the SysTick Control and Status Register. If read by the debugger using the DAP,
this bit is cleared on read-only if the MasterType bit in the AHB-AP Control Register is set
to 0. Otherwise, the COUNTFLAG bit is not changed by the debugger read.
0 = external reference clock.
1 = core clock.
If no reference clock is provided, it is held at 1 and so gives the same time as the core clock.
The core clock must be at least 2.5 times faster than the reference clock. If it is not, the count
values are Unpredictable.
1 = counting down to 0 pends the SysTick handler.
0 = counting down to 0 does not pend the SysTick handler. Software can use the
COUNTFLAG to determine if ever counted to 0.
1 = counter operates in a multi-shot way. That is, counter loads with the Reload value and
then begins counting down. On reaching 0, it sets the COUNTFLAG to 1 and optionally
pends the SysTick handler, based on TICKINT. It then loads the Reload value again, and
begins counting.
0 = counter disabled.
SysTick Reload Value Register
Use the SysTick Reload Value Register to specify the start value to load into the current
value register when the counter reaches 0. It can be any value between 1 and
A start value of 0 is possible, but has no effect because the SysTick interrupt and
COUNTFLAG are activated when counting from 1 to 0.
Therefore, as a multi-shot timer, repeated over and over, it fires every N+1 clock pulse,
where N is any value from 1 to
clock pulses, 99 must be written into the RELOAD. If a new value is written on each
tick interrupt, so treated as single shot, then the actual count down must be written. For
example, if a tick is next required after 400 clock pulses, 400 must be written into the
RELOAD.
The register address, access type, and Reset state are:
Address
0xE000E014
Access
Read/write
Copyright © 2005-2008 ARM Limited. All rights reserved.
. So, if the tick interrupt is required every 100
0x00FFFFFF
Non-Confidential
.
0x00FFFFFF
ARM DDI 0337G
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