ARM Cortex-M3 Technical Reference Manual page 11

Table 9-2
Table 9-3
Table 9-4
Table 9-5
Table 9-6
Table 9-7
Table 9-8
Table 9-9
Table 9-10
Table 9-11
Table 10-1
Table 10-2
Table 10-3
Table 10-4
Table 10-5
Table 11-1
Table 11-2
Table 11-3
Table 11-4
Table 11-5
Table 11-6
Table 11-7
Table 11-8
Table 11-9
Table 11-10
Table 11-11
Table 11-12
Table 11-13
Table 11-14
Table 11-15
Table 11-16
Table 11-17
Table 11-18
Table 11-19
Table 11-20
Table 11-21
Table 11-22
Table 11-23
Table 11-24
Table 11-25
Table 11-26
Table 11-27
Table 11-28
Table 11-29
Table 11-30
Table 11-31
Table 11-32
ARM DDI 0337G
Unrestricted Access
MPU Type Register bit assignments ......................................................................... 9-4
MPU Control Register bit assignments ..................................................................... 9-6
MPU Region Number Register bit assignments ........................................................ 9-7
MPU Region Base Address Register bit assignments .............................................. 9-8
MPU Region Attribute and Size Register bit assignments ........................................ 9-9
MPU protection region size field ............................................................................. 9-10
TEX, C, B encoding ................................................................................................. 9-13
Cache policy for memory attribute encoding ........................................................... 9-14
AP encoding ............................................................................................................ 9-14
XN encoding ............................................................................................................ 9-14
Core debug registers ............................................................................................... 10-2
Debug Halting Control and Status Register ............................................................ 10-4
Debug Core Register Selector Register .................................................................. 10-7
Debug Exception and Monitor Control Register ...................................................... 10-9
Application registers for use in core debug ........................................................... 10-13
FPB register summary ............................................................................................ 11-7
Flash Patch Control Register bit assignments ........................................................ 11-8
COMP mapping ..................................................................................................... 11-10
Flash Patch Remap Register bit assignments ...................................................... 11-11
Flash Patch Comparator Registers bit assignments ............................................. 11-12
DWT register summary ......................................................................................... 11-14
DWT Control Register bit assignments ................................................................. 11-16
DWT Current PC Sampler Cycle Count Register bit assignments ........................ 11-19
DWT CPI Count Register bit assignments ............................................................ 11-20
DWT Exception Overhead Count Register bit assignments .................................. 11-21
DWT Sleep Count Register bit assignments ......................................................... 11-22
DWT LSU Count Register bit assignments ........................................................... 11-23
DWT Fold Count Register bit assignments ........................................................... 11-23
DWT Program Counter Sample Register bit assignments .................................... 11-24
DWT Comparator Registers 0-3 bit assignments .................................................. 11-24
DWT Mask Registers 0-3 bit assignments ............................................................ 11-25
Bit functions of DWT Function Registers 0-3 ........................................................ 11-26
Settings for DWT Function Registers .................................................................... 11-28
ITM register summary ........................................................................................... 11-30
ITM Trace Enable Register bit assignments ......................................................... 11-32
ITM Trace Privilege Register bit assignments ....................................................... 11-33
ITM Trace Control Register bit assignments ......................................................... 11-34
ITM Integration Write Register bit assignments .................................................... 11-36
ITM Integration Read Register bit assignments .................................................... 11-36
ITM Integration Mode Control Register bit assignments ....................................... 11-37
ITM Lock Access Register bit assignments .......................................................... 11-37
ITM Lock Status Register bit assignments ............................................................ 11-38
AHB-AP register summary .................................................................................... 11-40
AHB-AP Control and Status Word Register bit assignments ................................ 11-41
AHB-AP Transfer Address Register bit assignments ............................................ 11-42
AHB-AP Data Read/Write Register bit assignments ............................................. 11-43
AHB-AP Banked Data Register bit assignments ................................................... 11-43
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