ARM Cortex-M3 Technical Reference Manual page 318

R2p0
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Embedded Trace Macrocell Interface
Port name
ETMIA[31:1]
ETMFOLD
ETMFLUSH
ETMFINDBR
ETMCANCEL
15-4
Direction
Qualified by
Output
No qualifier
Output
ETMIVALID
Output
No qualifier
Output
ETMFLUSH
Output
No qualifier
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Non-Confidential
Table 15-1 ETM interface ports (continued)
Description
Instruction address. Indicates the current fetch address of
the opcode in execution, or of the last opcode executed.
You can determine the context by examining:
ETMIVALID
HALTED
SLEEPING.
The ETM examines this net when ETMIVALID is
asserted. The DWT examines this net for PC samples and
bus watching.
Opcode fold. Indicates that an IT opcode has been folded
in this cycle. PC advances past the current (16-bit) opcode
and the IT instruction (16 bits). This affects the ETMIA.
Flush marker of PC event. A PC modifying opcode has
executed or an interrupt push/pop has started. The ETM
can use this control to complete outstanding packets in
preparation for an ETMIBRANCH event.
Flush is indirect. Marks that the PC cannot deduce the
flush hint destination.
Current opcode in execute has been cancelled. Opcodes
that are interrupted restart or continue on return to this
execution context. These include:
LDR/STR
LDRD/STRD
LDM/STM
U/SMULL
MLA
U/SDIV
MSR
CPSID
ARM DDI 0337G
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