ARM Cortex-M3 Technical Reference Manual page 122

R2p0
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Exceptions
5-26
; Example Context Switch (Assumes Thread is already on PSP)
MRS r12, PSP
STMDB r12!, {r4-r11, LR}
LDR r0, =OldPSPValue
STR r12, [r0]
LDR r0, =NewPSPValue
LDR r12, [r0]
LDMIA r12!, {r4-r11, LR}
MSR PSP, r12
BX lr
Note
In Example 5-4 on page 5-25 and Example 5-5, the only time the decision to move
Thread from MSP to PSP can be made, or the non-stacked registers can be guaranteed
not to have been modified by a stacked Handler, is when there is only one active
ISR/Handler.
Copyright © 2005-2008 ARM Limited. All rights reserved.
Example 5-5 Implement a simple context switcher
; Recover PSP into R12
; Push non-stack registers
; Get pointer to old Thread Control Block
; Store SP into Thread Control Block
; Get pointer to new Thread Control Block
; Acquire new Process SP
; Restore non-stacked registers
; Set PSP to R12
; Return back to Thread
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