Table 17-9 Formatter And Flush Control Register Bit Assignments; Figure 17-7 Formatter And Flush Control Register Bit Assignments - ARM Cortex-M3 Technical Reference Manual

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31
Bits
[31:14]
[13]
[12]
[11]
[10]
[9]
[8]
[7]
[6]
[5]
[4]
ARM DDI 0337G
Reserved

Figure 17-7 Formatter and Flush Control Register bit assignments

Table 17-9 describes the bit assignments of the Formatter and Flush Control Register.

Table 17-9 Formatter and Flush Control Register bit assignments

Field
Function
-
Reserved.
StopTrig
Stop the formatter after a Trigger Event is observed.
StopFI
Stop the formatter after a flush completes.
-
Reserved.
TrigFI
Indicates a trigger on Flush completion.
TrigEVT
Indicate a trigger on a Trigger Event.
TrigIN
Indicate a trigger on TRIGIN being asserted.
-
Reserved.
FOnMan
Manually generate a flush of the system.
FOnTrig
Generate flush using Trigger event.
FOnFlln
Generate flush using the FLUSHIN interface.
Copyright © 2005-2008 ARM Limited. All rights reserved.
14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
StopTrig
StopFI
Reserved
TrigFI
TrigEVT
TrigIn
Reserved
FOnMan
FOnTrig
FOnFlln
Reserved
EnFCont
EnFTC
Trace Port Interface Unit
17-13

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