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Operation
Move immediate 8-bit value to register
Move low register value to low register
Move high or low register value to high or low register
Multiply register values
Move complement of register value to register
Negate register value and store in register
No operation
Bitwise logical OR register values
Pop registers from stack
Pop registers and PC from stack
Push registers onto stack
Push LR and registers onto stack
Reverse bytes in word and copy to register
Reverse bytes in two halfwords and copy to register
Reverse bytes in low halfword [15:0], sign-extend, and copy to register
Rotate right by amount in register
Subtract register value and C flag from register value
Send event
Store multiple register words to sequential memory locations
Store register word to register address + 5-bit immediate offset
Store register word to register address
Store register word to SP address + 8-bit immediate offset
Store register byte [7:0] to register address + 5-bit immediate offset
Store register byte [7:0] to register address
Store register halfword [15:0] to register address + 5-bit immediate offset
ARM DDI 0337G
Unrestricted Access
Table 2-4 16-bit Cortex-M3 instruction summary (continued)
Copyright © 2005-2008 ARM Limited. All rights reserved.
Non-Confidential
Programmer's Model
Assembler
MOV <Rd>, #<immed_8>
MOV <Rd>, <Rn>
MOV <Rd>, <Rm>
MUL <Rd>, <Rm>
MVN <Rd>, <Rm>
NEG <Rd>, <Rm>
NOP <c>
ORR <Rd>, <Rm>
POP <registers>
POP <registers, PC>
PUSH <registers>
PUSH <registers, LR>
REV <Rd>, <Rn>
REV16 <Rd>, <Rn>
REVSH <Rd>, <Rn>
ROR <Rd>, <Rs>
SBC <Rd>, <Rm>
SEV <c>
STMIA <Rn>!, <registers>
STR <Rd>, [<Rn>, #<immed_5> * 4]
STR <Rd>, [<Rn>, <Rm>]
STR <Rd>, [SP, #<immed_8> * 4]
STRB <Rd>, [<Rn>, #<immed_5>]
STRB <Rd>, [<Rn>, <Rm>]
STRH <Rd>, [<Rn>, #<immed_5> * 2]
2-15
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