Table of Contents
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Revisions
Change
ETM Trigger Even Register description upgraded
ETM Status Register description updated
TraceEnable register replaced by Trace Start/Stop Resource
Control
TraceEnable Control 2 register added
Lock Status Register added
Description of FIFOFULL Region Register added
Description of FIFOFULL Level Register updated
Description of CoreSight Trace ID Register updated
Description ETM Control Register implementation bits
expanded
Description of TraceEnable Control 1 Register updated
Description ETM ID Register updated to reflect revision 2
Subsection describing ETM Event Resources added
Subsection describing Cross Trigger Interface added
Branch status interface section updated
Note about HADDRICore and HTRANSICore removed
Example of an opcode sequence timing diagram updated
Description of APB interface inputs added
B-4
Table B-1 Differences between issue E and issue F (continued)
Copyright © 2005-2008 ARM Limited. All rights reserved.
Non-Confidential
Location
Table 14-9 on page 14-16
ETM Control Register on page 14-19
TraceEnable Control 1 Register on page 14-21
ETM ID Register on page 14-21
ETM Event resources on page 14-22
Cross trigger interface on page 14-23
Branch status interface on page 15-6
Branch status interface on page 15-6
Figure 15-9 on page 15-13
APB interface on page 17-7
ARM DDI 0337G
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