ARM Cortex-M3 Technical Reference Manual page 308

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Table of Contents

Embedded Trace Macrocell

Synchronization Frequency

Configuration Code Extension

Extended External Input Selector

TraceEnable Start/Stop Embedded ICE

Embedded ICE Behavior Control

CoreSight Trace ID

OS Save/Restore

Power Down Status Register

Integration Mode Control

Non-Confidential

Table 14-9 ETM registers (continued)

For a description, see page 14-21.

No extended external inputs

implemented.

Bits [19:16] configure DWT

comparator inputs to use as stop

resources. Bits [3:0] configure

DWT Comparator inputs to use as

start resources.

Embedded ICE (DWT

comparator) inputs use the default

Implemented as normal.

reserved and must not be used

when the ETM is active.

OS Save/Restore not

implemented. RAZ, ignore writes.

For a description, see page 14-22.

Sets [1:0] to EXTIN[1:0], [4] to

Sets [0] to TRIGGER.

Sets [0] to ATREADY.

Sets [0] to ATVALID.

Implemented as normal.

Implements the 4-bit claim tag.

Implemented as normal.

ARM DDI 0337G

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