Figure 17-15 Swo Shared With Traceport; Figure 17-16 Swo Shared With Jtag-Tdo - ARM Cortex-M3 Technical Reference Manual

Trace Port Interface Unit
CortexM3Integration
17.3.3 SWO Shared with JTAG-TDO
CortexM3Integration
17-22
TRACEDATA[0]
CM3TPIU
For minimal pin count, it is possible to overlay JTAG debug and SWO on the same
package pin. This approach is only recommended where there is no provision for a
conventional trace port, or for use with more complex system-level debug configuration
controls.
If this option is chosen, the Instrumentation Trace is not accessible while the debug port
is being used in a JTAG configuration. Serial wire debug and SWO can be used together
at the same time.
To implement this option, the JTAGNSW output from SWJ-DP is used to control the
multiplexor. Figure 17-16 shows the SWO shared with JTAG-TDO option.
SWJ-DP CM3TPIU
JTAGNSW
Copyright © 2005-2008 ARM Limited. All rights reserved.
TRACEDATA[3:1]
0
TRACESWO
1
SWOACTIVE

Figure 17-15 SWO shared with TRACEPORT

TRACEDATA[3:0]
TRACESWO
JTAGTDO

Figure 17-16 SWO shared with JTAG-TDO

TRACEDATA[3:1]
SWV/TRACEDATA[0]
TRACEDATA[3:0]
0
TDO/SWV
1
ARM DDI 0337G