Table 19-7 Test Input Ports Timing Parameters; Table 19-8 Etm Input Port Timing Parameters; Table 19-9 Miscellaneous Output Ports Timing Parameters - ARM Cortex-M3 Technical Reference Manual

R2p0
Hide thumbs Also See for Cortex-M3:
Table of Contents

Advertisement

ARM DDI 0337G
Unrestricted Access
Table 19-7 shows the timing parameters for the test input ports.
Table 19-8 shows the timing parameters for the Embedded Trace Macrocell (ETM).
Table 19-9 shows the timing parameters for the miscellaneous output ports.
Output delay Min.
Clock uncertainty
Clock uncertainty
Clock uncertainty
Clock uncertainty
Clock uncertainty
Clock uncertainty
Copyright © 2005-2008 ARM Limited. All rights reserved.

Table 19-7 Test input ports timing parameters

Input delay Min.
Clock uncertainty
Clock uncertainty
Clock uncertainty
Clock uncertainty
Clock uncertainty
Clock uncertainty

Table 19-8 ETM input port timing parameters

Input delay Min.
Clock uncertainty
Clock uncertainty

Table 19-9 Miscellaneous output ports timing parameters

Output delay Max.
50%
50%
50%
50%
50%
50%
Non-Confidential
AC Characteristics
Input delay Max.
10%
10%
10%
10%
10%
10%
Input delay Max.
Signal name
30%
ETMPWRUP
50%
ETMFIFOFILL
Signal name
LOCKUP
SYSRESETREQ
BRCHSTAT[3:0]
HALTED
TXEV
ATIDITM[6:0]
Signal name
SE
SI
RSTBYPASS
CGBYPASS
WSII
WSOI
19-5

Advertisement

Table of Contents
loading

Table of Contents