ARM DDI 0337G
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Table 19-7 shows the timing parameters for the test input ports.
Table 19-8 shows the timing parameters for the Embedded Trace Macrocell (ETM).
Table 19-9 shows the timing parameters for the miscellaneous output ports.
Output delay Min.
Clock uncertainty
Clock uncertainty
Clock uncertainty
Clock uncertainty
Clock uncertainty
Clock uncertainty
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Table 19-7 Test input ports timing parameters
Input delay Min.
Clock uncertainty
Clock uncertainty
Clock uncertainty
Clock uncertainty
Clock uncertainty
Clock uncertainty
Table 19-8 ETM input port timing parameters
Input delay Min.
Clock uncertainty
Clock uncertainty
Table 19-9 Miscellaneous output ports timing parameters
Output delay Max.
50%
50%
50%
50%
50%
50%
Non-Confidential
AC Characteristics
Input delay Max.
10%
10%
10%
10%
10%
10%
Input delay Max.
Signal name
30%
ETMPWRUP
50%
ETMFIFOFILL
Signal name
LOCKUP
SYSRESETREQ
BRCHSTAT[3:0]
HALTED
TXEV
ATIDITM[6:0]
Signal name
SE
SI
RSTBYPASS
CGBYPASS
WSII
WSOI
19-5