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Power Management
7.2.4
Using the Wake-up Interrupt Controller
7-6
If the sleep mode is used to clock gate the HCLK signal, as Figure 7-1 on page 7-4
shows, then SLEEPHOLDACKn must be inverted and OR'd together with
SLEEPING to produce the clock gate enable term. HCLK must be enabled when the
debugger is used. Alternatively a GATEHCLK signal, which you can find on the
CortexM3Integration level, can be used for gating control of HCLK.
This subsection describes how to use the Wake-up Interrupt Controller (WIC). It
contains the following:
•
WIC overview
•
WIC functionality.
WIC overview
The Cortex-M3 NVIC has logic dedicated to determining whether at any point in time
a newly received interrupt is of higher priority than the current priority and must
therefore be taken over the current execution context or priority. This priority scheme
also operates during WFE, WFI, and sleep-on-exit to determine when the core must
resume execution of instructions after sleeping.
For ultra-low power applications, it is desirable to be able to significantly reduce the
dynamic and static power of the processor while in very-deep-sleep modes. This can be
achieved by stopping clocks or removing power from the processor, or both. When
powered off, the NVIC is unable to prioritize or detect interrupts. This means that
knowing when to come out of very-deep-sleep becomes problematic. The Wake-up
Interrupt Controller (WIC) provides significantly reduced gate count interrupt
detection logic that can take over and emulate the full NVIC behavior when correctly
primed by the full NVIC on entry to very-deep-sleep. The small size of the WIC ensures
that its power requirements fit the budget available while in very-deep-sleep mode
enabling it to always remain powered.
Unlike the NVIC, the WIC has no prioritization logic. It implements a rudimentary
interrupt masking system, signalling for wake-up as soon as a non-masked interrupt is
detected. The WIC contains no programmer's model visible state and is therefore
invisible to end users of the device other than through the benefits of reduced power
consumption while sleeping.
WIC functionality
You can use the WIC to gate FCLK and also to switch off power to the processor, if
required. The Power Management Unit (PMU) first communicates to the WIC by
asserting an enable called WICENREQ to the WIC. The WIC then sends a request to
the processor to agree to WIC mode sleep. If the processor acknowledges then the WIC
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