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Change
Addition of note about configuring TPIU registers to be
present or not
The following TPIU registers removed from summary table
and descriptions:
•
Trigger control registers
•
EXTCTL port registers
•
Test pattern registers
The following TPIU registers added to the summary table
and descriptions:
•
Integration Register: TRIGGER
•
Integration Mode Control Register
•
Integration Register: FIFO data 0
•
Integration Register: FIFO data 1
•
Claim tag set register
•
Claim tag clear register
•
Device ID register
•
PID registers
•
CID registers
Change
Wake-up Interrupt Controller (WIC) added to Cortex-M3 block
diagram
Section 1-2 and section 1-3 combined
New subsection added to list changes in functionality between
r1p1 and r2p0
New subsection added to describe the WIC
New bullet point to describe FIXHMASTERTYPE pin
Table of supported instruction removed
ARM DDI 0337G
Unrestricted Access
Table B-1 Differences between issue E and issue F (continued)
Copyright © 2005-2008 ARM Limited. All rights reserved.
Non-Confidential
Location
Summary of the TPIU registers on page 17-8
Table 17-5 on page 17-8 and Description of the TPIU
registers on page 17-9
Table B-2 Differences between issue F and issue G
Location
Figure 1-1 on page 1-5
Components, hierarchy, and implementation on
page 1-4
Differences in functionality between r1p1 and r2p0
on page 1-20
WIC on page 1-10
Differences in functionality between r1p1 and r2p0
on page 1-20
Chapter 2 Programmer's Model
Revisions
B-5
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