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Signal Descriptions
A.12
ETM interface
Name
ETMTRIGGER[3:0]
ETMTRIGINOTD[3:0]
ETMIVALID
ETMIA[31:1]
ETMICCFAIL
ETMIBRANCH
ETMIINDBR
ETMINTSTAT[2:0]
ETMINTNUM[8:0]
ETMISTALL
ETMFLUSH
ETMPWRUP
ETMDVALID
ETMCANCEL
ETMFINDBR
A-14
Table A-12 lists the signals of the ETM interface.
Direction
Description
Output
Trigger from DWT. One bit for each of the four DWT comparators.
Output
Indicates if the ETM is triggered on an instruction or data match.
Output
Instruction valid.
Output
PC of the instruction being executed.
Output
Condition Code fail. Indicates if the current instruction has failed or passed its
conditional execution check.
Output
Opcode is a branch target.
Output
Opcode is an indirect branch target.
Output
Interrupt status. Marks interrupt status of current cycle.
000 - no status
001 - interrupt entry
010 - interrupt exit
011 - interrupt return
100 - vector fetch and stack push.
ETMINTSTAT entry/return is asserted in the first cycle of the new interrupt
context. Exit occurs without ETMIVALID.
Output
Marks the interrupt number of the current execution context.
Output
Indicates that the last instruction signalled by the core has not yet entered
execute.
Output
A PC modifying opcode has executed, or an interrupt push/pop has started.
Input
ETM is enabled
Output
Data valid
Output
Instruction cancelled
Output
Flush is indirect. Marks flush hint destination cannot be inferred from the PC.
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Table A-12 ETM interface
ARM DDI 0337G
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