ARM Cortex-M3 Technical Reference Manual page 393

R2p0
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Change
Addition of note about configuring flash patch registers to be
present or not
First bullet point updated
Addition of note about configuring DWT registers to be
present or not
DWT Control Register reset state updated
DWT Control Register bit assignments updated
Addition of note about configuring ITM registers to be
present or not
ITM Trace Control Register TSENA field bit function
updated
Addition of note about configuring AHB-AP registers to be
present or not
AHB-AP Banked Data Register DATA field reset value
removed
Addition of information about absence of debug
functionality
Information about exclusive memory accesses updated
Note about bit-band accesses updated
ETM block diagram updated
HCLK and CLK replaced by FCLK
ARM DDI 0337G
Unrestricted Access
Table B-1 Differences between issue E and issue F (continued)
Copyright © 2005-2008 ARM Limited. All rights reserved.
Non-Confidential
Location
FPB programmer's model on page 11-6
DWT on page 11-13
Summary and description of the DWT registers on
page 11-13
DWT Control Register on page 11-15
Figure 11-5 on page 11-16 and Table 11-7 on page 11-16
Summary and description of the ITM registers on
page 11-30
Table 11-22 on page 11-34
Summary and description of the AHB-AP registers on
page 11-39
Table 11-32 on page 11-43
About the DP on page 13-2
Exclusives on page 12-6 and Exclusives on page 12-7
Bit-band accesses on page 12-13
Figure 14-1 on page 14-3
Table 14-2 on page 14-4, Table 14-3 on page 14-5,
Table 14-4 on page 14-5, Table 14-5 on page 14-6, and
Table 14-6 on page 14-6
Revisions
B-3

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