Table 14-3 Trace Port Signals; Table 14-4 Other Signals - ARM Cortex-M3 Technical Reference Manual

Name Description
ATDATAM[7:0] Eight-bit trace data
ATVALIDM ATDATA is valid
ATIDM[6:0] Trace Source ID
ATREADYM Indicates that the Trace Port is able to accept the Data on ATDATA
AFREADYM Indicates that the ETM FIFO is empty
ARM DDI 0337G
Unrestricted Access
Name Description
MAXEXTIN[1:0] Maximum supported external inputs
CGBYPASS Bypass architectural clock gating cell
FIFOFULLEN Enable ETMFIFOFULL
Note
One of the EXTIN inputs to the ETM could be driven from the LOCKUP output from
the core to enable trace capture to stop, or trigger if a lockup condition occurs. The
EXTIN inputs are not synchronized in the ETM. If they are not driven from the ETM
clock, then you must synchronize them outside the ETM.
Name Description
FIFOPEEK[9:0] For validation purposes only
FIFOFULL ETM FIFO is full
ETMPWRUP Indicates that the ETM is powered up
ETMTRIGOUT Trigger occurred status signal
ETMDBGRQ Debug request to core
ETMEN ETM traceport enabled
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Table 14-2 Miscellaneous configuration inputs (continued)
Non-Confidential
Embedded Trace Macrocell
Direction Clock domain
Input FCLK
Input FCLK
Input FCLK

Table 14-3 Trace port signals

Direction Clock domain
Output FCLK
Output FCLK
Output FCLK
Input FCLK
Output FCLK

Table 14-4 Other signals

Direction Clock domain
Output FCLK
Output FCLK
Output FCLK
Output HCLK
Output FCLK
Output FCLK
14-5