Table 3-9 Tpiu Registers - ARM Cortex-M3 Technical Reference Manual

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System Control

Trace Port Interface Unit registers

Table 3-9 gives a summary of the Trace Port Interface Unit (TPIU) registers. For a

detailed description of the TPIU registers, see Chapter 17 Trace Port Interface Unit.

Name of register

Supported Sync Port Sizes Register

Current Sync Port Size Register

Async Clock Prescaler Register

Selected Pin Protocol Register

Formatter and Flush Status Register

Formatter and Flush Control Register

Formatter Synchronization Counter Register

Integration Register: ITATBCTR2

Integration Register: ITATBCTR0

Integration Mode Control Register

Integration register : FIFO data 0

Integration register : FIFO data 1

Claim tag set register

Claim tag clear register

Device ID register

Non-Confidential

Table 3-9 TPIU registers

0x00 or 0x102

ARM DDI 0337G

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