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Bus Interface
12.11 Write buffer
12-14
To prevent bus wait cycles from stalling the processor during data stores, buffered stores
to the DCode and System buses go through a one-entry write buffer. If the write buffer
is full, subsequent accesses to the bus stall until the write buffer has drained. The write
buffer is only used if the bus waits the data phase of the buffered store, otherwise the
transaction completes on the bus.
DMB and DSB instructions wait for the write buffer to drain before completing. If an
interrupt comes in while DMB/DSB is waiting for the write buffer to drain, the opcode
after the DMB/DSB is returned to on the completion of the interrupt. This is because
interrupt processing is a memory barrier operation.
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