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Programmer's Model
Operation
Register byte [7:0] to register address immediate 8-bit offset,
postindexed
Register byte [7:0] to register address shifted by 0, 1, 2, or 3
places
Store doubleword, preindexed
Store doubleword, postindexed
Store register exclusive calculates an address from a base
register value and an immediate offset, and stores a word from
a register to memory if the executing processor has exclusive
access to the memory addressed.
Store register exclusive byte derives an address from a base
register value, and stores a byte from a register to memory if
the executing processor has exclusive access to the memory
addressed
Store register exclusive halfword derives an address from a
base register value, and stores a halfword from a register to
memory if the executing processor has exclusive access to the
memory addressed.
Register halfword [15:0] to register address + immediate 12-bit
offset
Register halfword [15:0] to register address shifted by 0, 1, 2,
or 3 places
Register halfword [15:0] to register address immediate 8-bit
offset, preindexed
Register halfword [15:0] to register address immediate 8-bit
offset, postindexed
Subtract immediate 12-bit value from register value
Subtract shifted register value from register value
Subtract immediate 12-bit value from register value
Sign extend byte to 32 bits
Sign extend halfword to 32 bits
2-22
Table 2-5 32-bit Cortex-M3 instruction summary (continued)
Copyright © 2005-2008 ARM Limited. All rights reserved.
Non-Confidential
Assembler
STRB.W <Rxf>, [<Rn>], #+/–<offset_8>
STRB.W <Rxf>, [<Rn>, <Rm>{, LSL #<shift>}]
STRD.W <Rxf>, <Rxf2>, [<Rn>, #+/–<offset_8> * 4]{!}
STRD.W <Rxf>, <Rxf2>, [<Rn>, #+/–<offset_8> * 4]
STREX <c> <Rd>,<Rt>,[<Rn>{,#<imm>}]
STREXB <c> <Rd>,<Rt>,[<Rn>]
STREXH <c> <Rd>,<Rt>,[<Rn>]
STRH.W <Rxf>, [<Rn>, #<offset_12>]
STRH.W <Rxf>, [<Rn>, <Rm>{, LSL #<shift>}]
STRH{T}.W <Rxf>, [<Rn>, #+/–<offset_8>]{!}
STRH.W <Rxf>, [<Rn>], #+/–<offset_8>
SUB{S}.W <Rd>, <Rn>, #<modify_constant(immed_12)>
SUB{S}.W <Rd>, <Rn>, <Rm>{, <shift>}
SUBW.W <Rd>, <Rn>, #<immed_12>
SXTB.W <Rd>, <Rm>{, <rotation>}
SXTH.W <Rd>, <Rm>{, <rotation>}
ARM DDI 0337G
Unrestricted Access
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