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Embedded Trace Macrocell
14.5
ETM architecture
14.5.1
Restartable instructions
14.5.2
Exception return
14.5.3
Exception tracing
14-12
The ETM is an instruction only ETM that implements ARM ETM architecture v3.4. It
is based on the ARM ETM Architecture Specification. For full details, see the ARM
Embedded Trace Macrocell Architecture Specification.
All 32-bit Thumb instructions are traced as a single instruction. Instructions following
an IT instruction are traced as normal conditional instructions. The decompressor does
not have to refer to the IT instruction.
The ARMv7-M architecture can restart LSM instructions that are interrupted by an
exception. The ETM traces an instruction that has been interrupted by an exception by
indicating that it has been cancelled. On return from the exception, the ETM traces the
same instruction again, regardless of the instruction being restarted or resumed.
The ETM explicitly indicates return from an exception in the trace stream. This is
because exception return functionality is encoded in a data-dependent manner, and an
exception return behaves differently from a simple branch.
The packet encoding indicates a return from an exception. Figure 14-2 shows this.
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If a new, higher priority exception pre-empts the stack pop, the branch to the exception
handler must indicate that the last instruction was cancelled. This indicates that the
return from exception packet was cancelled, but the return from exception instruction
was not cancelled. If the return from exception packet is present, then this means that
the previous instruction did complete.
To trace exceptions, an optional field is added to a branch packet. This extra field
specifies the exception information. A normal branch packet is encoded in 1-5 bytes of
trace data, while the exception branch is as follows:
•
2-5 bytes of address
Copyright © 2005-2008 ARM Limited. All rights reserved.
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Figure 14-2 Return from exception packet encoding
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