Table 8-17 Application Interrupt And Reset Control Register Bit Assignments; Figure 8-11 Application Interrupt And Reset Control Register Bit Assignments - ARM Cortex-M3 Technical Reference Manual

31
Bits Field
[31:16] VECTKEY
[31:16] VECTKEYSTAT
[15] ENDIANESS
[14:11] -
[10:8] PRIGROUP
ARM DDI 0337G
Unrestricted Access
The register address, access type, and Reset state are:
Address
0xE000ED0C
Access Read/write
Reset state
0x00000000
Figure 8-11 shows the bit assignments of the Application Interrupt and Reset Control
Register.
VECTKEY/VECTKEYSTAT

Figure 8-11 Application Interrupt and Reset Control Register bit assignments

Table 8-17 describes the bit assignments of the Application Interrupt and Reset Control
Register.

Table 8-17 Application Interrupt and Reset Control Register bit assignments

Function
Register key. Writing to this register requires
the write value is ignored.
Reads as .
0xFA05
Data endianness bit:
1 = big endian
0 = little endian.
ENDIANESS is sampled from the BIGEND input port during reset. You cannot change
ENDIANESS outside of reset.
Reserved
Interrupt priority grouping field:
Copyright © 2005-2008 ARM Limited. All rights reserved.
16 15 14
Reserved
ENDIANESS PRIGROUP
Non-Confidential
Nested Vectored Interrupt Controller
11 10 8 7
Reserved
SYSRESETREQ
VECTCLRACTIVE
VECTRESET
0x5FA in the VECTKEY field. Otherwise
3 2 1 0
8-23