Trace Output - ARM Cortex-M3 Technical Reference Manual

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14.4

Trace output

ARM DDI 0337G
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The ETM outputs data 8 bits at a time, at the core clock speed. It does not support
different trace port sizes and trace port modes. The TPIU exports trace output off chip.
This output is compatible with the AMBA Trace Bus (ATB) protocol.
Because AFVALID functionality is not supported, the trace port cannot flush data from
the ETM FIFO. However, with an 8-bit ATB port the FIFO always drains, which makes
AFVALID unnecessary.
The Cortex-M3 system is equipped with an optimized TPIU that is designed for use
with the ETM and ITM. This TPIU does not support additional trace sources. However,
you can add additional trace sources if the TPIU has been replaced with a more complex
version, and more trace infrastructure.
Note
A trace ID register and output are provided for systems that use multiple trace sources.
The TPIU uses the formatted trace output protocol. This means that there is no
requirement for an extra pin for TRACECTL signal.
Trace output from the ETM is synchronous to the core clock. There is an asynchronous
FIFO in the trace port interface. If you want to integrate the ETM into a multi-core
system, you might have to use an asynchronous ATB bridge.
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Embedded Trace Macrocell
14-11

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