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Power Management
FCLK
SLEEPING
SLEEPDEEP
WICLOAD
WICCLEAR
WICMASK[]
WICINT[]
WICPEND
WAKEUP
nISOLATE
nRETAIN
PWRUP
7-8
2) Core enters deep sleep
1) NVIC drives WICLOAD before entering deep sleep
The signals below demonstrate the core power-down sequence
3) PMU isolates core power domain
4) PMU drives core state retention
5) PMU powers down core
Figure 7-5 on page 7-9 shows an example PMU, WIC, and NVIC interconnection with
example clamp values for a system using state retention cells. The clamp values have
been set to the same value to ease integration. The location of the WICPEND and
interrupt OR gates is not important. The clamps are typically inserted by the tools
during synthesis.
Copyright © 2005-2008 ARM Limited. All rights reserved.
6) Un-masked interrupt arrives
7) Interrupt pended, WIC notifies PMU by asserting WAKEUP
9) PMU drives state restoration
8) PMU powers up core
Figure 7-4 Power down timing sequence
Non-Confidential
11) Core sees incoming IRQ/NMI/RXEV
and asserts WICCLEAR
12) WIC pended interrupts
cleared and WAKEUP de-
asserted
10) PMU takes core out of isolation
ARM DDI 0337G
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