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Trace Port Interface Unit
Bits
[3:2]
[1]
[0]
17-14
Table 17-9 Formatter and Flush Control Register bit assignments (continued)
Field
Function
-
Reserved.
EnFCont
Continuous Formatting, no TRACECTL. This bit is set on reset.
EnFTC
Enable Formatting. Because TRACECTL is never present, this bit reads as zero.
Bit [8] of this register is always set to indicate that triggers are indicated when
TRIGGER is asserted.
When one of the two single wire output modes is selected, bit [1] of this register enables
the formatter to be bypassed. If the formatter is bypassed, only the ITM/DWT trace
source (ATDATA2) passes through. The TPIU accepts and discards data that is
presented on the ETM port (ATDATA1). This function is intended to be used when it is
necessary to connect a device containing an ETM to a trace capture device that is only
able to capture Serial Wire Output data. Enabling or disabling the formatter causes
momentary data corruption.
Note
If the selected pin protocol register is set to
Flush Control Register always reads
enabled. If one of the serial wire modes is then selected, the register reverts to its
previously programmed value.
Formatter Synchronization Counter Register
The global synchronization trigger is generated by the Program Counter (PC) Sampler
block. This means that there is no synchronization counter in the TPIU.
The register address, access type, and Reset state are:
Address
0xE0040308
Access
Read only
Reset state
0x00
Copyright © 2005-2008 ARM Limited. All rights reserved.
0x00
(TracePort mode), the Formatter and
, because the formatter is automatically
0x102
ARM DDI 0337G
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