ARM Cortex-M3 Technical Reference Manual page 405

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Halt mode
Host
HTM
ICode Memory
Illegal instruction
Implementation-defined
Implementation-specific
Instruction cycle count
Instrumentation trace
Intelligent Energy Management (IEM)
Internal PPB
Interrupt service
routine
Interrupt vector
Joint Test Action Group (JTAG)
ARM DDI 0337G
Unrestricted Access
One of two mutually exclusive debug modes. In halt mode all processor execution halts
when a breakpoint or watchpoint is encountered. All processor state, coprocessor state,
memory and input/output locations can be examined and altered by the JTAG interface.
See also Monitor debug-mode.
A computer that provides data and other services to another computer. Especially, a
computer providing debugging services to a target being debugged.
See AHB Trace Macrocell.
Memory space at
0x00000000
An instruction that is architecturally Undefined.
The behavior is not architecturally defined, but is defined and documented by individual
implementations.
The behavior is not architecturally defined, and does not have to be documented by
individual implementations. Used when there are a number of implementation options
available and the option chosen does not affect software compatibility.
The number of cycles for which an instruction occupies the Execute stage of the
pipeline.
A component for debugging real-time systems through a simple memory-mapped trace
interface, providing
printf
A technology that enables dynamic voltage scaling and clock frequency variation to be
used to reduce power consumption in a device.
PPB memory space at
0xE0000000
A program that control of the processor is passed to when an interrupt occurs.
One of a number of fixed addresses in low memory that contains the first instruction of
the corresponding interrupt service routine.
The name of the organization that developed standard IEEE 1149.1. This standard
defines a boundary-scan architecture used for in-circuit testing of integrated circuit
devices. It is commonly known by the initials JTAG.
Copyright © 2005-2008 ARM Limited. All rights reserved.
to
.
0x1FFFFFFF
style debugging.
to
0xE003FFFF
Non-Confidential
.
Glossary
Glossary-7

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