ARM Cortex-M3 Technical Reference Manual page 377

R2p0
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Name
VECTADDREN
DNOTITRANS
AUXFAULT[31:0]
IFLUSH
DBGRESTART
ARM DDI 0337G
Unrestricted Access
Direction
Description
Input
Reserved. Must be tied to 1'b0.
Input
Static tie-off that forces the processor to not permit ICode and DCode AHB
transactions to occur at the same time. This permits a simple bus
multiplexer to be instantiated externally to the processor.
Input
Auxiliary fault status information from the system.
Input
Reserved. Instruction flush, must be tied to 0.
Input
External restart request.
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Table A-3 Miscellaneous signals (continued)
Signal Descriptions
A-5

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