ARM Cortex-M3 Technical Reference Manual page 307

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Table of Contents

Trace Start/Stop Resource Control

TraceEnable Event

TraceEnable Control 1

TraceEnable Control 2

FIFOFULL Region

FIFOFULL Level

Address Comparators

External Outputs

CID Comparators

Implementation specific

ARM DDI 0337G

Unrestricted Access

Non-Confidential

Table 14-9 ETM registers (continued)

Embedded Trace Macrocell

Describes the TraceEnable

enabling event.

[16:14] Boolean function.

[13:7] Resource A.

[6:0] Resource B.

See ETM Event resources on

For a description, see page 14-21.

If enabled, FifoFull logic is always

The number of bytes left in the

FIFO, below which the

FIFOFULL signal is asserted to

stall the core. Bit [7] of the ETM

Control Register is used to enable

the FIFOFULL output.

All RAZ. Ignore writes.