Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 806

c.
d. Write PFS with setjmp_bsp.
6. Restore setjmp()'s return IP into BR7.
7. Return from longjmp() into setjmp()'s caller using br.ret instruction.
4.5.1.2 User-level Co-routines
The following steps need to be taken to execute a voluntary user-level thread switch.
1. Save all preserved register state of outgoing thread to memory stack. Refer to
Section 4.1
2. Preserve predicate, branch, and application registers.
3. Flush outgoing register stack to backing store, and switch to incoming thread's
backing store as described in
Switch" on page
4. Switch thread memory stack pointers.
5. Restore incoming thread's predicate, branch, and application registers.
6. Restore incoming thread's preserved register state.
4.5.2 Context Switching in an Operating System Kernel
4.5.2.1 Thread Switch within the Same Address Space
To switch between different threads in the same address space the following steps are
required:
1. Application architecture state associated with each thread (GRs, FRs, PRs, BRs,
ARs) are saved and restores as if this were a user-level coroutine. This is
described in
2. Memory Ordering: to preserve correct memory ordering semantics the context
switch routine needs to fence all memory references and flush cache (fc, fc.i)
operations by executing a sync.i and mf instruction. More details on memory
ordering are given in
4.5.2.2 Address Space Switching
When an operating system switches address spaces it needs to perform the same steps
as a same address space thread switch (described in the previous section). Additionally,
however between the saves of the outgoing and the restores of the incoming process,
the operating system context switch handler is required to:
1. Save the contents of the protection key registers associated with the outbound
context, and then invalidate the protection key registers.
2. Save the default control register (DCR) of the outbound context (if the DCR is
maintained on a per-process basis).
3. Save the region registers of the outbound address space.
4. Restore the region registers of the inbound address space.
2:558
Write RSC with setjmp_rsc.
for details on preservation of general and floating-point registers.
2:148. This code sequence includes ALAT invalidation.
Section 4.5.1.2.
Section
Section 6.11.3, "Synchronous Backing Store
2.3.
Volume 2, Part 2: Context Management