Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 432

Data Access-Bit vector (0x2800)
Name
Cause For data memory references (including IA-32), the access bit (TLB.a) in the TLB entry
for this page is 0, and the page is referenced.
Interruptions on this vector:
IR Data Access Bit fault
Data Access Bit fault
Parameters IIP, IPSR, IIPA, IFS – are defined; refer to
ITIR – The ITIR contains default translation information for the address contained in the
IFA. The access key field within this register is set to the region id value from the
referenced region register. The ITIR.ps field is set to the RR.ps field from the referenced
region register. All other fields are set to 0.
IFA – Faulting data address.
IIB0, IIB1 – If implemented, for Data Access Bit faults, the IIB registers contain the
instruction bundle pointed to by IIP. The IIB registers are undefined for IR Data Access
Bit faults. Please refer to
(IIB0-1 – CR26, 27)" on page 2:42
ISR – The value for the ISR bits depend on the type of access performed and are
specified below. For mandatory RSE fill or spill references, ISR.ed is always 0. For IA-32
memory references, ISR.code, ed, ei, ni, ir, rs, na and sp are 0.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
Notes These faults can only occur in these situations:
• When PSR.dt is 1 on an IA-32 or Itanium load, store, or semaphore operation
• When PSR.dt is 1 on a probe.fault
• When PSR.dt is 1 on an lfetch.fault
• When PSR.rt is 1 on an RSE mandatory load/store operation
For probe.fault or lfetch.fault the ISR.na bit is set.
Software uses this fault for memory management page replacement algorithms. The
PSR.da bit can be used to suppress this fault for one executed instruction or one
mandatory RSE memory reference.
2:184
Section 3.3.5.10, "Interruption Instruction Bundle Registers
0 0
0
page 2:165 for a detailed description.
for details on the IIB registers.
ed
Volume 2, Part 1: Interruption Vector Descriptions
8 7 6 5 4 3 2
0 code{3:0}
ei so ni ir rs sp na r w 0
1 0